SemiconductorsRenesasJapan · Tokyo

Programme PMO for a multi-site MCU ramp.

MCU demand across three fabs and two design centres forced Renesas to add programme-director capacity fast — two multi-site NPI leaders placed in eight weeks.

Renesas faced coordinated ramp pressure across three fabs and two design centres. Internal programme-management capacity was exhausted, and cross-site governance was becoming the bottleneck — not silicon yield.

PER ran a retained search for semiconductor programme directors with multi-site NPI experience across Japan and Taiwan. Candidates needed to speak both fab operations and design-centre delivery, a profile more common in IDM leadership tracks than generic PMO backgrounds.

Two programme directors were placed in eight weeks. Cross-site ramp governance was in place before peak build — preventing the firefighting Renesas wanted to avoid.

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